A MISFET is formed by forming a gate electrode on a substrate via a gate insulating film and forming a source/drain region on the substrate.
Also, there is a technique of forming a MISFET by growing a source/drain epitaxial layer on a substrate.
Japanese Patent Application Laid-Open Publication No. 2000-277745 (Patent Document 1) discloses a technique regarding a double-gate MOSFET using a SOI substrate.
Japanese Patent Application Laid-Open Publication No. 2007-165665 (Patent Document 2) discloses a technique in which a p-channel-type MISFET is formed on a Si substrate, a trench is formed in a region serving as source and drain regions of the p-channel-type MISFET, and a SiGe layer is buried in that trench by an epitaxial growth method.